Journal
JAPANESE JOURNAL OF APPLIED PHYSICS
Volume 50, Issue 4, Pages -Publisher
IOP PUBLISHING LTD
DOI: 10.1143/JJAP.50.04DC01
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Funding
- Ministry of Education, Culture, Sports, Science and Technology of Japan [22860004]
- Grants-in-Aid for Scientific Research [22860004] Funding Source: KAKEN
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The low-frequency noise was already a strong limiting factor for radio frequency/analog integrated circuits and was expected to become soon for the digital ones. However, a very significant and effective reduction of the 1/f noise level has been realized for both n- and p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) by the means of two new fabrication processes, opening new horizons for the very large scale integration (VLSI) technology. Indeed, a significant reduction of more than two decades of the noise level has been achieved by implementing a new salicide structure for the source and drain contacts. Moreover, on account of a new process flow involving a newly developed plasma process for the realization of the gate oxide, one of the noise source, the induced mobility fluctuations, located in the channel and generating the 1/f noise has been neutralized in the case of the p-MOSFETs. Furthermore, the implementation of an adapted salicide structure in addition to the plasma process will make the insulator charge fluctuations the sole noise source in these devices. (C) 2011 The Japan Society of Applied Physics
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