4.2 Article

An analogue model of the memristor

Publisher

WILEY
DOI: 10.1002/jnm.786

Keywords

memristor; constitutive relation; JFET; operational amplifier; analogue model

Funding

  1. Czech Grant Agency [P102/10/1614]
  2. BUT [MSM0021630503]
  3. UD, Czech Republic [MO FVT0000403]

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The paper presents a working electrical scheme modeling the memristor. The scheme allows experimenting with the model under various testing signals. The user can use it to verify the theoretical presumptions about the memristor properties. Examples of several typical measurements are shown. Copyright 2010 John Wiley & Sons, Ltd.

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