Journal
INTERNATIONAL JOURNAL OF NEURAL SYSTEMS
Volume 20, Issue 6, Pages 447-461Publisher
WORLD SCIENTIFIC PUBL CO PTE LTD
DOI: 10.1142/S0129065710002541
Keywords
FPGA; ESNN; hardware/software co-design
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This paper presents an approach that permits the effective hardware realization of a novel Evolvable Spiking Neural Network (ESNN) paradigm on Field Programmable Gate Arrays (FPGAs). The ESNN possesses a hybrid learning algorithm that consists of a Spike Timing Dependent Plasticity (STDP) mechanism fused with a Genetic Algorithm (GA). The design and implementation direction utilizes the latest advancements in FPGA technology to provide a partitioned hardware/software co-design solution. The approach achieves the maximum FPGA flexibility obtainable for the ESNN paradigm. The algorithm was applied as an embedded intelligent system robotic controller to solve an autonomous navigation and obstacle avoidance problem.
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