Three-stage nested-Miller-compensated operational amplifiers: Analysis, design, and optimization based on settling time

Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation

(2008) A. Pugliese et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Design of low-power single-stage operational amplifiers based on an optimized settling model

(2008) Hamed Aminzadeh et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers

(2008) A. Pugliese et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

Capacitor-free low dropout regulators using nested Miller compensation with active resistor and 1-bit programmable capacitor array

(2008) W.-J. Huang et al.   IET Circuits Devices & Systems

Design of high-speed two-stage cascode-compensated operational amplifiers based on settling time and open-loop parameters

(2007) Hamed Aminzadeh et al.   INTEGRATION-THE VLSI JOURNAL

Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers

(2007) S. O. Cannizzaro et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

Analytical comparison of frequency compensation techniques in three-stage amplifiers

(2006) A. D. Grasso et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS