Journal
IEICE ELECTRONICS EXPRESS
Volume 5, Issue 24, Pages 1042-1048Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
DOI: 10.1587/elex.5.1042
Keywords
Chaotic Circuits; Neural Networks; CMOS
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Funding
- Balearic Islands Government [PROGECIB-32A]
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A chaotic integrated circuit is designed and fabricated using a 0.35 mu m CMOS process. The circuit iterates an N-shaped transfer function using a small analog neural network. One of the advantages of the proposed circuit is its small circuit area with only 13 MOS transistors. The circuit generates both an analog and a digital signal that can be used to create true random bit sequences.
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