4.7 Article

Design of Impedance Measuring Circuits Based on Phase-Sensitive Demodulation Technique

Journal

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT
Volume 60, Issue 4, Pages 1276-1282

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TIM.2010.2084770

Keywords

Analog multiplier; dual frequency; dual mode; electrical impedance tomography (EIT); phase-sensitive demodulation (PSD)

Funding

  1. China Scholarship Council

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Impedance measuring circuits play a crucial role in an electrical impedance tomography system, in which capacitance and resistance need to be measured accurately at a high speed. Several impedance measuring circuits based on phase-sensitive demodulation (PSD) have been designed, tested, and presented in this paper. The measurement error is analyzed, and the mismatch of the measured capacitance and resistance is considered to be the main cause of the measurement error. A new impedance measuring circuit with dual-frequency PSD has been designed to solve this problem. It has been proven by experiment that this circuit can be used to measure both capacitance and resistance with an uncertainty of less than 0.5%.

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