4.6 Article

Methodology for the Study of Dynamic ON-Resistance in High-Voltage GaN Field-Effect Transistors

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 60, Issue 10, Pages 3190-3196

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2013.2274477

Keywords

Border traps; current collapse; dynamic ON-resistance; FET; GaN; high electron-mobility transistor (HEMT); transient; trapping

Funding

  1. U.S. Department of Energy [DE-AR0000123]
  2. Semiconductor Research Corporation [2011-VJ-2162]
  3. DRIFT MURI under an ONR Grant [N00014-08-1-0655]

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We have developed a new methodology to investigate the dynamic ON-resistance (R-ON) of high-voltage GaN field-effect transistors. The new technique allows the study of R-ON transients after a switching event over an arbitrary length of time. Using this technique, we have investigated dynamic R-ON transients in AlGaN/GaN high-voltage, high electron-mobility transistors over a time span of ten decades under a variety of conditions. We find that right after an OFF-to-ON switching event, R-ON can be several times higher under dc conditions. The increase in R-ON is enhanced as the drain-source voltage in the OFF-state increases. The R-ON recovery process after an OFF-to-ON switching event is characterized by a fast release of trapped charge through a temperature-independent tunneling process followed by conventional thermally activated detrapping on a longer timescale. After a high-power-to-ON switching event, in contrast, detrapping only takes place through a temperature-independent process. We postulate that the fast temperature-independent detrapping originates from interface states at the AlGaN barrier/AlN spacer interface. The thermally activated detrapping can arise from traps at the surface of the device or inside the AlGaN barrier. These findings are relevant in the quest to engineer a reliable GaN power switch with minimum dynamic R-ON problems.

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