Metal–Oxide–High-$k$ -Oxide–Silicon Memory Device Using a Ti-Doped $\hbox{Dy}_{2}\hbox{O}_{3}$ Charge-Trapping Layer and $\hbox{Al}_{2}\hbox{O}_{3}$ Blocking Layer

Title
Metal–Oxide–High-$k$ -Oxide–Silicon Memory Device Using a Ti-Doped $\hbox{Dy}_{2}\hbox{O}_{3}$ Charge-Trapping Layer and $\hbox{Al}_{2}\hbox{O}_{3}$ Blocking Layer
Authors
Keywords
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Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 58, Issue 11, Pages 3847-3851
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2011-10-05
DOI
10.1109/ted.2011.2165285

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