Comparison of MONOS Memory Device Integrity When Using $\hbox{Hf}_{1 - x - y}\hbox{N}_{x}\hbox{O}_{y}$ Trapping Layers With Different N Compositions

Title
Comparison of MONOS Memory Device Integrity When Using $\hbox{Hf}_{1 - x - y}\hbox{N}_{x}\hbox{O}_{y}$ Trapping Layers With Different N Compositions
Authors
Keywords
-
Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 55, Issue 6, Pages 1417-1423
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2008-05-21
DOI
10.1109/ted.2008.920973

Ask authors/readers for more resources

Discover Peeref hubs

Discuss science. Find collaborators. Network.

Join a conversation

Become a Peeref-certified reviewer

The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.

Get Started