Vertical InAs Nanowire Wrap Gate Transistors on Si Substrates

Title
Vertical InAs Nanowire Wrap Gate Transistors on Si Substrates
Authors
Keywords
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Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 55, Issue 11, Pages 3037-3041
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2008-11-12
DOI
10.1109/ted.2008.2005179

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