4.6 Article

Innovative materials, devices, and CMOS technologies for low-power mobile multimedia

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 55, Issue 1, Pages 96-130

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2007.911338

Keywords

CMOS; double gate; emerging technologies; FinFET; fully depleted silicon-on-insulator (FDSOI); gate dielectric; germanium; H-K; low power; metallic gate; mobile; mobility; MOSFET; multimedia; multithreshold voltage; nanotechnologies; power dissipation; roadmap; shallow junction; silicon; silicon-on-nothing (SON); SRAM; static noise margin (SNM); strain; technology; thin body; thin BOX; variability; 32 nm

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The paradigm and the usage of CMOS are changing, and so are the requirements at all levels, from transistor to an entire CMOS system. The traditional drivers, such as speed and density of integration, are subject to other prerogatives related to variability, manufacturability, power consumption/dissipation (mobile products!), mix of varied digital and analog/RF functions (system-on-chip integration), etc. Controllability of variations and static leakage will add to, and in certain products prevail, over speed and density. Implications at all levels are multiple and are more diverse than just speed and smallness. The goal of the authors has been to see the problem globally from the product level and to place its components in their true proportions. Therefore, we will start with drawing the product-level picture and placing it in a historical perspective. Next, we will review the state of the art, the requirements, and solutions at the level of materials, transistor, and technology. Detailed analysis and potential solutions for prolonging CMOS as the leading information technology are presented in this paper.

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