Journal
IEEE TRANSACTIONS ON COMPUTERS
Volume 61, Issue 8, Pages 1189-1202Publisher
IEEE COMPUTER SOC
DOI: 10.1109/TC.2011.124
Keywords
Automatic synthesis; multiple valued logic; data encryption
Funding
- EPSRC [GR/F016786/1]
- Engineering and Physical Sciences Research Council [EP/H049606/1, EP/J006238/1, EP/G034303/1, EP/K004379/1] Funding Source: researchfish
- EPSRC [EP/K004379/1, EP/H049606/1, EP/J006238/1, EP/G034303/1] Funding Source: UKRI
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The choice of radix is crucial for multivalued logic synthesis. Practical examples, however, reveal that it is not always possible to find the optimal radix when taking into consideration actual physical parameters of multivalued operations. In other words, each radix has its advantages and disadvantages. Our proposal is to synthesize logic in different radices, so it may benefit from their combination. The theory presented in this paper is based on Reed-Muller expansions over Galois field arithmetic. The work aims to first estimate the potential of the new approach and to second analyze its impact on circuit parameters down to the level of physical gates. The presented theory has been applied to real-life examples focusing on cryptographic circuits where Galois Fields find frequent application. The benchmark results show that the approach creates a new dimension for the trade-off between circuit parameters and provides information on how the implemented functions are related to different radices.
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