Memristor Crossbar Architecture for Synchronous Neural Networks

This paper focuses on suitable architecture and neural network training using crossbar connections of memristive elements. We developed a novel memristor training scheme that preserves high density of synaptic connections in the crossbar organization. We designed supporting circuits and performed time domain analog simulation of the architecture, to demonstrate that it properly adjusts memristor values during neural network training. A single sensing and winner-takes-all circuit is used to adjust strength of synaptic connections implemented by all memristors. We present results of HSPICE simulation of the developed architecture, generated control signals and resulting changes of memristor values. We used crosstalk test and Monte Carlo analysis to demonstrate robustness of the proposed architecture. Tests performed on MNIST character recognition benchmark confirmed functionality of the proposed circuit and training scheme in a practical and demanding application. The proposed approach improves available in the literature architecture and training methods for memristive neural networks.