A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network

Title
A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network
Authors
Keywords
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Journal
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 49, Issue 9, Pages 2067-2082
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2014-07-12
DOI
10.1109/jssc.2014.2332134

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