A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory

Scalability and Design-Space Analysis of a 1T-1MTJ Memory Cell for STT-RAMs

(2012) Richard Dorrance et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

A 32 nm, 3.1 Billion Transistor, 12 Wide Issue Itanium® Processor for Mission-Critical Servers

(2011) Reid Riedlinger et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches

(2011) Ki Chul Chun et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Development of Embedded STT-MRAM for Mobile System-on-Chips

(2011) Kangho Lee et al.   IEEE TRANSACTIONS ON MAGNETICS

Low writing energy and sub nanosecond spin torque transfer switching of in-plane magnetic tunnel junction for spin torque transfer random access memory

(2011) H. Zhao et al.   JOURNAL OF APPLIED PHYSICS

A 45 nm 8-Core Enterprise Xeon¯ Processor

(2010) Stefan Rusu et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and `1'/`0' Dual-Array Equalized Reference Scheme

(2010) Riichiro Takemura et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 45 nm SOI Embedded DRAM Macro for the POWER™ Processor 32 MByte On-Chip L3 Cache

(2010) John Barth et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Power7: IBM's Next-Generation Server Processor

(2010) Ron Kalla et al.   IEEE MICRO

SPICE Macromodel of Spin-Torque-Transfer-Operated Magnetic Tunnel Junctions

(2010) Jonathan D. Harms et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Comparison of Scaling of In-Plane and Perpendicular Spin Transfer Switching Technologies by Micromagnetic Simulation

(2010) Dmytro Apalkov et al.   IEEE TRANSACTIONS ON MAGNETICS

A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier

(2008) John Barth et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current Read

(2008) Takayuki Kawahara et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

The Impact of Random Device Variation on SRAM Cell Stability in Sub-90-nm CMOS Technologies

(2007) Kanak Agarwal et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS