Spur-Free Multirate All-Digital PLL for Mobile Phones in 65 nm CMOS

Title
Spur-Free Multirate All-Digital PLL for Mobile Phones in 65 nm CMOS
Authors
Keywords
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Journal
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 46, Issue 12, Pages 2904-2919
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2011-09-02
DOI
10.1109/jssc.2011.2162769

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