A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes

Authors

Keywords

Journal

Volume 45, Issue 1, Pages 142-152

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Online

2010-01-06

DOI

10.1109/jssc.2009.2034414

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