Journal
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 44, Issue 9, Pages 2535-2542Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2009.2024819
Keywords
Amplifiers; CMOS analog integrated circuits; fast operational amplifiers; low-power low-voltage integrated circuits; operational amplifiers; operational transconductance amplifiers
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A recycling amplifier architecture based on the folded cascode transconductance amplifier is described. The proposed amplifier delivers an appreciably enhanced performance over that of the conventional folded. This is achieved by using previously idle devices in the signal path, which results in an enhanced transconductance, gain, and slew rate. Moreover, the input referred noise and offset analyses are included to demonstrate that the proposed modifications have no adverse effects on these design metrics. Transistor-level simulations and experimental results in TSMC 0.18 mu m CMOS process confirm the theoretical results. When compared to the conventional folded cascode, and for the same area and power budgets, the proposed amplifier has almost twice the bandwidth (134.2 MHz versus 70.7 MHz) and better than twice the slew rate (94.1 V/mu s versus 42.1 V/mu s) while driving the same 5.6 pF load. Also a gain enhancement of 7.6 dB is observed.
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