Yeh葉宗皇Chung-Huang

Taiwan National Central University

ORCID
Published in 2023
Prediction of the Test Yield of Future Integrated Circuits Through the Deductive Estimation Method
Authors: Chung-Huang Yeh, Jwu E Chen
Journal: Journal of Circuits, Systems and Computers
ORCID
Published in 2023
Recycling Test Methods to Improve Test Capacity and Increase Chip Shipments
Authors: Chung-Huang Yeh, Jwu E. Chen
Journal: IEEE Design & Test
ORCID
Published in 2023
Multiple Retest Systems for Screening High-Quality Chips
Authors: Chung-Huang Yeh, Jwu E. Chen
Journal: Journal of Electronic Testing
ORCID
Published in 2022
Application of Three-Repetition Tests Scheme to Improve Integrated Circuits Test Quality to Near-Zero Defect
Authors: Chung-Huang Yeh, Jwu-E Chen
Journal: Sensors
ORCID
Published in 2022
Using Enhanced Test Systems Based on Digital IC Test Model for the Improvement of Test Yield
Authors: Chung-Huang Yeh, Jwu-E Chen, Chia-Jui Chang, Tse-Chia Huang
Journal: Electronics
ORCID
Published in 2021
Unbalanced-Tests to the Improvement of Yield and Quality
Authors: Chung-Huang Yeh, Jwu-E Chen
Journal: Electronics
ORCID
Published in 2020
Test yield and quality analysis models of chips
Authors: Chung Huang Yeh, Jwu E Chen
Journal: Journal of the Chinese Institute of Engineers
ORCID
Published in 2019
Repeated Testing Applications for Improving the IC Test Quality to Achieve Zero Defect Product Requirements
Authors: Chung-Huang Yeh, Jwu E. Chen
Journal: Journal of Electronic Testing