Low power self-controllable voltage level and low swing logic based 11T SRAM cell for high speed CMOS circuits

A design of low swing and multi threshold voltage based low power 12T SRAM cell

(2015) P. Upadhyay et al.   COMPUTERS & ELECTRICAL ENGINEERING

A 256-kb 9T Near-Threshold SRAM With 1k Cells per Bitline and Enhanced Write and Read Operations

(2015) Ghasem Pasandi et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

A Subthreshold Symmetric SRAM Cell With High Read Stability

(2014) Roghayeh Saeidi et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

Low-Power Multiport SRAM With Cross-Point Write Word-Lines, Shared Write Bit-Lines, and Shared Write Row-Access Transistors

(2014) Dao-Ping Wang et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing

(2012) Ming-Hsien Tu et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Variability aware low leakage reliable SRAM cell design technique

(2012) A. Islam et al.   MICROELECTRONICS RELIABILITY

P-P-N Based 10T SRAM Cell for Low-Leakage and Resilient Subthreshold Operation

(2011) Cheng-Hung Lo et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells

(2011) Hassan Mostafa et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

Yield-Driven Near-Threshold SRAM Design

(2009) Gregory Chen et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Characterization of a Novel Nine-Transistor SRAM Cell

(2008) Zhiyu Liu et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS