4.6 Article

Challenges to Partial Switching of Hf0.8Zr0.2O2 Gated Ferroelectric FET for Multilevel/Analog or Low-voltage Memory Operation

期刊

IEEE ELECTRON DEVICE LETTERS
卷 40, 期 9, 页码 1423-1426

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2019.2931430

关键词

Ferroelectric; hafnium zirconium oxide; memory; gate last; silicon-on-insulator; neuromorphic computing; deep learning; artificial intelligence

资金

  1. Berkeley Center for Negative Capacitance Transistors

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The ability to partially switch an FeFET could enable their use as an embedded low-voltage memory and as analog weight storage in artificial neural networks (ANNs). We report on memory characterization of FeFETs gated with 5.5-nm Hf0.8Zr0.2O2, fabricated on fully depleted silicon-on-insulator using a self-aligned, gate last process. We find that for a single device, excellent elevated temperature retention, program/erase endurance, and read endurance are obtained; however, there is significant device to device variability in the response of the ferroelectric to a partially switching program pulse, which may require the use of feedback in programming.

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