期刊
MICROELECTRONICS RELIABILITY
卷 61, 期 -, 页码 24-29出版社
PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.microrel.2016.03.001
关键词
Graded channel gate stack; High-K oxide thickness; Analog performance; RF performance
资金
- Department of Science and Technology [SB/S3/EECE/067/2014]
- CSIR [90/096(770)/2013-EMR-I]
- AICTE [8-206/RIFD/RPS/POLICY-1/2014-15]
- Silicon Institute of Technology, Patia Hills, Bhubaneswar 751024, India
In this paper, the graded channel gate stack (GCGS) DG MOSFET structure is studied in view of increasing device performance and immunity to short channel effects. The device has the advantage of improved gate oxide reliability, suppressed parasitic bipolar effect, lower DIBL and higher cut-off frequency. Therefore, the device must be investigated with respect to the variation of different structure dependent parameters before fabrication to have better reliability and constancy. In this work we have studied the device with respect to variation in high K oxide thickness (t(oxh)) and channel length (L-g) to have better understanding on variation of different analog/RF performance parameters. The results validate that variations in t(oxh) of the device significantly alters device performance parameters and must be pre accounted for realizing reliable analog/RF system on chip circuits. (C) 2016 Elsevier Ltd. All rights reserved.
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