Schmitter trigger-based single-ended stable 7T SRAM cell

Half‐selection disturbance free 8T low leakage SRAM cell

(2022) Rohit Lorenzo et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

Correction: A 9T high-stable and Low-Energy Half-Select-Free SRAM Cell Design using TMDFETs

(2022) Erfan Abbasian et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Process evaluation in FinFET based 7T SRAM cell

(2021) T. Santosh Kumar et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

One-Sided Schmitt-Trigger-Based 9T SRAM Cell for Near-Threshold Operation

(2020) Keonhee Cho et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A Schmitt-trigger based low read power 12T SRAM cell

(2020) Ashish Sachdeva et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Characterization of Half-Select Free Write Assist 9T SRAM Cell

(2019) Soumitra Pal et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Low Leakage Fully Half-Select-Free Robust SRAM Cells with BTI Reliability Analysis

(2018) Sayeed Ahmad et al.   IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY

A novel 8T SRAM with improved cell density

(2018) B. Naresh Kumar Reddy et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Power-Gated 9T SRAM Cell for Low-Energy Operation

(2017) Tae Woo Oh et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors

(2017) G. Torrens et al.   IEEE Transactions on Emerging Topics in Computing

Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology

(2016) Younghwi Yang et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell

(2016) C. B. Kushwah et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell

(2016) Sayeed Ahmad et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Supply Voltage Decision Methodology to Minimize SRAM Standby Power Under Radiation Environment

(2015) Md Mehedi Hassan Galib et al.   IEEE TRANSACTIONS ON NUCLEAR SCIENCE

A 256-kb 9T Near-Threshold SRAM With 1k Cells per Bitline and Enhanced Write and Read Operations

(2015) Ghasem Pasandi et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist

(2010) Ming-Hsien Tu et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

Flexible Circuits and Architectures for Ultralow Power

(2010) Benton Highsmith Calhoun et al.   PROCEEDINGS OF THE IEEE