Evaluating the use of adder compressors for power-efficient HEVC interpolation filter architecture

出版年份 2016 全文链接

标题

作者

关键词

Video coding, HEVC, Hardware architecture, VLSI design, Interpolation filter, Adder compressors

出版物

Volume 89, Issue 1, Pages 111-120

出版商

Springer Nature

发表日期

2016-05-21

DOI

10.1007/s10470-016-0765-6

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