Extreme ultraviolet lithography and three dimensional integrated circuit-A review

Extreme ultraviolet lithography (EUVL) and three dimensional integrated circuit (3D IC) were thoroughly reviewed. Since proposed in 1988, EUVL obtained intensive studies globally and, after 2000, became the most promising next generation lithography method even though challenges were present in almost all aspects of EUVL technology. Commercial step-and-scan tools for preproduction are installed now with full field capability; however, EUV source power at intermediate focus (IF) has not yet met volume manufacturing requirements. Compared with the target of 200 W in-band power at IF, current tools can supply only approximately 40-55 W. EUVL resist has improved significantly in the last few years, with 13 nm line/space half-pitch resolution being produced with approximately 3-4 nm line width roughness (LWR), but LWR needs 2x improvement. Creating a defect-free EUVL mask is currently an obstacle. Actual adoption of EUVL for 22 nm and beyond technology nodes will depend on the extension of current optical lithography (193 nm immersion lithography, combined with multiple patterning techniques), as well as other methods such as 3D IC. Lithography has been the enabler for IC performance improvement by increasing device density, clock rate, and transistor rate. However, after the turn of the century, IC scaling resulted in short-channel effect, which decreases power efficiency dramatically, so clock frequency almost stopped increasing. Although further IC scaling by lithography reduces gate delay, interconnect delay and memory wall are dominant in determining the IC performance. 3D IC technology is a critical technology today because it offers a reasonable route to further improve IC performance. It increases device density, reduces the interconnect delay, and breaks memory wall with the application of 3D stacking using through silicon via. 3D IC also makes one chip package have more functional diversification than those enhanced only by shrinking the size of the features. The main advantages of 3D IC are the smaller form factor, low energy consumption, high speed, and functional diversification. EUVL, if adopted, will continue to enable IC performance improvement at a slower rate, but 3D IC provides an alternative way to improve the system performance. The best scenario is the adoption of both EUVL and 3D IC. However, the possible further delay of EUVL could enhance the realization of 3D IC for IC system improvement. (C) 2014 AIP Publishing LLC.