4.7 Article

3-D Hyperintegration and Packaging Technologies for Micro-Nano Systems

期刊

PROCEEDINGS OF THE IEEE
卷 97, 期 1, 页码 18-30

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JPROC.2008.2007458

关键词

Hyperintegration; InfoTech-NanoTech-BioTech systems; three-dimensional (3-D) integration; through silicon via; wafer alignment; wafer bonding; 3-D packaging

资金

  1. Defense Advanced Research Projects Agency
  2. MARCO
  3. NYSTAR

向作者/读者索取更多资源

Three-dimensional (3-D) hype rintegration is an emerging technology, which vertically stacks and interconnects multiple materials, technologies, and functional components to form highly integrated micro-nano systems. This 3-D hyperintegration is expected to lead to an industry paradigm shift due to its tremendous benefits. Worldwide academic and industrial research activities currently focus on technology innovations, simulation and design, and product prototypes. Anticipated applications start with memory, handheld devices, and high-performance computers and extend to high-density multifunctional heterogeneous integration of InfoTech-NanoTech-BioTech systems. This paper overviews the 3-D hyperintegration and packaging technologies, including motivations, key technology platforms, status, and perspectives towards commercialization. The challenges associated with the 3-D technologies are addressed, including integration architectures and design tools, yield and cost, thermal and mechanical constraints, and manufacturing infrastructure.

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