期刊
IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 61, 期 3, 页码 878-883出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2014.2300115
关键词
Electric field effects; field effect transistors (FETs); high-voltage techniques; power semiconductor devices; semiconductor device breakdown; transistors
A simplified model for field plates applied to field effect transistors is developed with conformal mapping. From the model, universal design rules are generated for field plate length (L-FP) and field plate distance from the channel (a(1)) based on aspect ratio (LFP/a(1)) and pinchoff voltage of the field plate. These rules can then be used for finite element model refinement or experimental starting points for process design of experiments for field plate optimization.
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