4.5 Article

Architecting efficient interconnects for large caches with CACTI 6.0

期刊

IEEE MICRO
卷 28, 期 1, 页码 69-79

出版社

IEEE COMPUTER SOC
DOI: 10.1109/MM.2008.2

关键词

-

向作者/读者索取更多资源

Interconnects play an increasingly important role in determining the power and performance characteristics of modern processors. An enhanced version of the popular CACTI tool primarily focuses on interconnect design for large scalable caches. The new version can help evaluate novel interconnection networks for cache access and accurately estimate the delay, power, and area of large caches with uniform and nonuniform access times.

作者

我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。

评论

主要评分

4.5
评分不足

次要评分

新颖性
-
重要性
-
科学严谨性
-
评价这篇论文

推荐

暂无数据
暂无数据