Good Endurance and Memory Window for $ \hbox{Ti/HfO}_{x}$ Pillar RRAM at 50-nm Scale by Optimal Encapsulation Layer

出版年份 2011 全文链接

标题

作者

关键词

出版物

Volume 32, Issue 3, Pages 390-392

出版商

Institute of Electrical and Electronics Engineers (IEEE)

发表日期

2011-02-01

DOI

10.1109/led.2010.2099201

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