期刊
APPLIED PHYSICS LETTERS
卷 103, 期 23, 页码 -出版社
AMER INST PHYSICS
DOI: 10.1063/1.4839275
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资金
- EPSRC through the Innovative electronic-Manufacturing Research Centre, Loughborough, UK [FS/01/01/10]
- EPSRC [EP/H03014X/1, EP/J000825/1] Funding Source: UKRI
- Engineering and Physical Sciences Research Council [EP/J000825/1, EP/H03014X/1] Funding Source: researchfish
A systematic investigation has been undertaken, in which thin polymer buffer layers with different ester content have been spin-coated onto a flash-evaporated, cross-linked diacrylate gate-insulator to form bottom-gate, top-contact organic thin-film transistors. The highest device mobilities, similar to 0.65 cm(2)/V s and similar to 1.00 cm(2)/V s for pentacene and dinaphtho[2,3-b:2',3'-f]-thieno[3,2-b]thiophene (DNTT), respectively, were only observed for a combination of large-grain (similar to 1-2 mu m) semiconductor morphology coupled with a non-polar dielectric surface. No correlation was found between semiconductor grain size and dielectric surface chemistry. The threshold voltage of pentacene devices shifted from -10 V to -25 V with decreasing surface ester content, but remained close to 0 V for DNTT. (C) 2013 AIP Publishing LLC.
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