4.6 Article

Characterizing the Electrical Properties of a Novel Junctionless Poly-Si Ultrathin-Body Field-Effect Transistor Using a Trench Structure

期刊

IEEE ELECTRON DEVICE LETTERS
卷 36, 期 2, 页码 150-152

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2014.2378785

关键词

Trench junctionless field-effect transistor (trench JL-FET); nanowires (NWs); and three-dimensional (3-D)

资金

  1. Ministry of Science and Technology of Taiwan [MOST-103-2221-E-007-114-MY3]
  2. National Nano Device Laboratories, Hsinchu, Taiwan
  3. Taiwan National Center for High-Performance

向作者/读者索取更多资源

Ultrathin channel trench junctionless poly-Si field-effect transistor (trench JL-FET) with a 2.4-nm channel thickness is experimentally demonstrated. Dry etching process is used to form trench structures, which define channel thickness (T-CH) and gate length (L-G). These devices (L-G = 0.5 mu m) show excellent performance in terms of steep subthreshold swing (100 mV/decade) and high I-ON/I-OFF current ratio (10(6)A/A) and practically negligible drain-induced barrier lowering (similar to 0 mV/V). The I-ON current of the trench JL-FET can be further increased by the quantum confinement effect. Importantly, owing to its excellent device characteristics and simplicity of fabrication, the trench JL-FET has great potential for using in advanced 3-D-stacked IC applications.

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