期刊
INTEGRATION-THE VLSI JOURNAL
卷 69, 期 -, 页码 85-97出版社
ELSEVIER
DOI: 10.1016/j.vlsi.2018.03.004
关键词
CCSDS-122.0-B-1; Image compression; FPGA; High-throughput; Low-memory
Two low-memory and high-performance architectures for the CCSDS 122.0-B-1 standard are proposed. They use novel memory organizations to reduce the total memory requirements in order to be implemented in a single FPGA device. The architectures were implemented in radiation-hardened and commercial FPGA devices. Based on the experimental results for the case of Virtex5QV radiation-hardened device, the throughput is 135 MSamples/sec for image with 12 bits/pixel and horizontal resolution up 8192 pixels. Also, the proposed architectures outperform the existing one in terms of the memory requirements and area.
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