4.6 Article

A High-Performance Gate Engineered InGaN Dopingless Tunnel FET

期刊

IEEE TRANSACTIONS ON ELECTRON DEVICES
卷 65, 期 3, 页码 1223-1229

出版社

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2018.2796848

关键词

Charge plasma; dc; energy delay product (EDP); gate engineering; InGaN; RF

资金

  1. National Natural Science Foundation of China [61334002, 61604115]

向作者/读者索取更多资源

A gate engineered InGaN dopingless tunnel FET (DL-TFET) using the charge plasma concept is proposed and investigated by silvaco Atlas simulation. In0.75Ga0.25N is a direct gap semiconductor, and the effective tunneling mass of electron and hole is smaller than that of silicon, which induces that the drain current and average subthreshold swing (SSavg) of InGaN DL-TFET improve 1.3 x 10(2) times and 51.1% than that of Si DL-TFET at the overdrive voltage of 0.5 V, respectively. What is more, better device performances are achieved by gate engineering with appropriate In fraction, proper space between the gate and source (L-gs), and appropriate tunneling gate work function (Phi(TG)). The direct-current, RF, and energy-efficient performance studies show that SSavg of 7.9 mV/dec, an on-state current (I-ON) of 8.02 x 10(-5) A/mu m, a cutoff frequency (f(T)) of 119 GHz, and an energy delay product of 0.64 fJ-ps/mu m can be obtained in the proposed TFET. This paper indicates that the gate engineered InGaN DL-TFET is a promising TFET for low-power RF and digital logic applications.

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