Article
Computer Science, Hardware & Architecture
Se-Hyeong Lee, So-Young Bak, Chan-Yeong Park, Dongki Baek, Moonsuk Yi
Summary: This study aims to improve the electrical performance of amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) by fabricating indium-zinc oxide (IZO) TFTs with HfO2/Al2O3 gate insulator deposited via low-temperature atomic layer deposition (ALD). The optimized TFTs showed significantly improved subthreshold swing, saturation carrier mobility, on-off current ratio, and threshold voltage shift compared to conventional samples.
Article
Chemistry, Physical
E. Schiliro, S. E. Panasci, A. M. Mio, G. Nicotra, S. Agnello, B. Pecz, G. Z. Radnoczi, I. Deretzis, A. La Magna, F. Roccaforte, R. Lo Nigro, F. Giannazzo
Summary: This paper investigates the atomic layer deposition (ALD) of ultra-thin films of Al2O3 and HfO2 on gold-supported monolayer MoS2, providing insights into the nucleation mechanisms in the early stages of the ALD process. The characterization reveals a tensile strain and p-type doping distribution at the micro-scale, local strain variations at the nanoscale, and atomic scale variability in the Mo-Au atomic distances. Ab initio DFT calculations show the significant influence of the Au substrate on the MoS2 energy band structure and the enhanced physisorption of the precursors due to nanoscale morphological effects. The nucleation and growth of Al2O3 and HfO2 films on 1L-MoS2/Au are studied, revealing slower growth rate for HfO2 and formation of continuous films for both materials at higher ALD cycles. The films show different conductive behavior and strain effects, influencing the MoS2 properties.
APPLIED SURFACE SCIENCE
(2023)
Article
Multidisciplinary Sciences
Suraj S. Cheema, Nirmaan Shanker, Li-Chen Wang, Cheng-Hsiang Hsu, Shang-Lin Hsu, Yu-Hung Liao, Matthew San Jose, Jorge Gomez, Wriddhi Chakraborty, Wenshen Li, Jong-Ho Bae, Steve K. Volkman, Daewoong Kwon, Yoonsoo Rho, Gianni Pinelli, Ravi Rastogi, Dominick Pipitone, Corey Stull, Matthew Cook, Brian Tyrrell, Vladimir A. Stoica, Zhan Zhang, John W. Freeland, Christopher J. Tassone, Apurva Mehta, Ghazal Saheli, David Thompson, Dong Ik Suh, Won-Tae Koo, Kab-Jin Nam, Dong Jin Jung, Woo-Bin Song, Chung-Hsun Lin, Seunggeol Nam, Jinseong Heo, Narendra Parihar, Costas P. Grigoropoulos, Padraic Shafer, Patrick Fay, Ramamoorthy Ramesh, Souvik Mahapatra, Jim Ciston, Suman Datta, Mohamed Mohamed, Chenming Hu, Sayeef Salahuddin
Summary: This study reports a new method utilizing HfO2-ZrO2 superlattice heterostructures as gate stacks, which does not require scavenging the interfacial SiO2 and can provide lower leakage current and no mobility degradation.
Article
Engineering, Electrical & Electronic
Yuqin Xia, Lu Liu, Xinge Tao, Yuying Tian, Jing-Ping Xu
Summary: In this work, negative-capacitance field-effect transistors (NCFETs) based on Hf1-xAlxOy ferroelectric films were fabricated, and the effects of the Al content in Hf1-xAlxOy films and the thicknesses of the ferroelectric Hf1-xAlxOy layer/Al2O3 match layer on the electrical properties of the NCFETs were investigated. The results showed that by decreasing the Al content and increasing/decreasing the thicknesses of the ferroelectric layer/the match layer, the gate-stack of Hf1-xAlxOy/Al2O3 exhibited a larger remanent polarization intensity, and the subthreshold swing (SS) and total hysteresis of the NCFETs were reduced. The optimized device performance was achieved using Hf0.95Al0.05Oy ferroelectric film with a thickness of 10 nm and Al2O3 match layer with a thickness of 2 nm, resulting in a low SS of 35.4 mV/dec, high ON/OFF current ratio of 5.0 x 10(6), and negligible hysteresis of 36.2 mV. The enhanced ferroelectricity of Hf1-xAlxOy films and the good matching between the ferroelectric capacitance and MOS capacitance of devices under suitable structure and process parameters contributed to these improvements.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2023)
Review
Computer Science, Information Systems
Chong-Myeong Song, Hyuk-Jun Kwon
Summary: The discovery of ferroelectricity in HfO2 thin film has reignited interest in ferroelectric memory devices. Despite the high potential of ferroelectric HfO2-based devices for combining logic and memory functions, challenges in endurance and characterization remain to be overcome. Various applications, such as negative capacitance, FeRAM, FTJ, and FeFET, have been explored in the fabrication and characteristics of ferroelectric HfO2 films.
Article
Chemistry, Physical
Yujin Lee, Kangsik Kim, Zonghoon Lee, Hong-Sub Lee, Han-Bo-Ram Lee, Woo-Hee Kim, Il-Kwon Oh, Hyungjun Kim
Summary: In this study, Dy incorporation was used to stabilize HfO2 films and increase the grain size, which resulted in a reduction of leakage current density and an increase in breakdown strength. The properties of Dy-doped HfO2 thin films were characterized using various analysis techniques. The phase transformation of HfO2 films from different planes to a main m(-111) plane was observed through X-ray diffraction, indicating the role of Dy in stabilizing the film. The increase in grain size due to Dy incorporation was confirmed by electron microscopy.
CHEMISTRY OF MATERIALS
(2023)
Article
Engineering, Electrical & Electronic
Haozhi Ni, Min Li, Xiaohai Li, Xiwen Zhu, Hanhao Liu, Miao Xu, Lei Wang, Song Qiu, Junbiao Peng
Summary: In this study, laminated hafnium oxide/alumina was used as the encapsulation material to improve the performance of carbon nanotube thin-film transistors (CNT-TFT). The laminated HfO2/Al2O3 showed excellent hysteresis suppression ability and improved reliability and gate bias stress stability for the TFT devices. The hysteresis suppression was mainly attributed to the removal of water and oxygen molecules adsorption on the carbon nanotubes backchannel surface and the passivation effect to the defects at the interface between the carbon nanotubes and the gate insulator.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2022)
Article
Engineering, Electrical & Electronic
Min-Lu Kao, Yan-Kui Liang, Yuan Lin, You-Chen Weng, Chang-Fu Dee, Po-Tsun Liu, Ching-Ting Lee, Edward Yi Chang
Summary: This study experimentally demonstrates the HfO2/Al2O3/AlN hybrid stack capacitor with ferroelectric switching and shows the potential feasibility of the hybrid gate stack in high voltage memory device applications.
IEEE ELECTRON DEVICE LETTERS
(2022)
Article
Engineering, Electrical & Electronic
P. La Torraca, F. Caruso, A. Padovani, G. Tallarida, S. Spiga, L. Larcher
Summary: We present a comprehensive characterization of amorphous alumina in MIM stacks, extracting the distribution of atomic defects and bond-breaking process parameters. The active defects were profiled through various simulations, and the extracted defect energies were consistent with oxygen vacancies and aluminum interstitials. The breakdown statistics of voltage-dependent dielectric breakdown were investigated, showing complex and polarity-dependent breakdown patterns correlating with defect distributions.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2022)
Article
Computer Science, Information Systems
Pengying Chang, Gang Du, Xiaoyan Liu
Summary: By studying the polarization evolution in HfO2-based metal-ferroelectric-insulator-metal (MFIM) structure, the correlation between domain patterns and negative capacitance effects is revealed. The design space for stabilized negative capacitance is limited by phase transitions, indicating the potential and limitations of FE HfO2 for energy-efficient steep-slope devices.
SCIENCE CHINA-INFORMATION SCIENCES
(2021)
Article
Engineering, Electrical & Electronic
Carlotta Gastaldi, Matteo Cavalieri, Ali Saeidi, Eamon O'Connor, Francesco Bellando, Igor Stolichnov, Adrian M. Ionescu
Summary: In this work, the authors experimentally explore and compare FET gate stacks with and without an inner metal plane, demonstrating that the absence of the inner metal plane stabilizes the negative capacitance regime, leading to hysteresis-free performance.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2022)
Article
Materials Science, Multidisciplinary
J. V. Li, A. T. Neal, T. J. Asel, Y. Kim, S. Mou
Summary: We investigate the intermixing effects of doping profile and carrier emission from deep levels in the capacitance-voltage measurement of 8-Ga2O3 wide bandgap semiconductor material. We find that the non-uniformity of doping measured under practical conditions is mainly caused by artifacts due to carrier emission from deep levels. We develop a procedure to measure hysteresis in cyclic capacitance-voltage experiments for probing the deep levels contributing to the apparent doping profile. Analyzing this hysteresis enables more accurate determination of doping density and its spatial distribution, as well as extraction of energy, density, and capture cross-section of the deep levels.
Article
Physics, Applied
Hannah N. Masten, Jamie D. Phillips, Rebecca L. Peterson
Summary: The thermal stability of atomic layer deposited HfO2 in a stack with β-Ga2O3 was investigated. Gallium diffusion into HfO2 at high temperature increased leakage current, while an increase in interface traps caused forward bias leakage at lower temperatures.
JOURNAL OF APPLIED PHYSICS
(2022)
Article
Physics, Applied
L. B. Young, J. Liu, Y. H. G. Lin, H. W. Wan, L. S. Chiang, J. Kwo, M. Hong
Summary: We have achieved a record low subthreshold slope in InGaAs MOSFETs at 300 K by using in situ deposited Al2O3/Y2O3 as a gate dielectric and a self-aligned inversion-channel gate-first process. The temperature-dependent transfer characteristics showed a linear reduction of subthreshold slope with temperature, reaching a value comparable to state-of-the-art InGaAs FinFET at 77 K.
JAPANESE JOURNAL OF APPLIED PHYSICS
(2022)
Article
Chemistry, Inorganic & Nuclear
Byeong Guk Ko, Chi Thang Nguyen, Bonwook Gu, Mohammad Rizwan Khan, Kunwoo Park, Hongjun Oh, Jungwon Park, Bonggeun Shong, Han-Bo-Ram Lee
Summary: This study investigates the effects of counter reactants on surface termination and growth characteristics of ALD HfO2 thin films. By varying the combination and sequence of exposure to reactants, the film growth behaviors and properties can be controlled. XPS and DFT simulations show that the changes in film properties are attributed to the surface terminations formed from different counter reactant combinations.
DALTON TRANSACTIONS
(2021)
Article
Engineering, Electrical & Electronic
Zhicheng Wu, Jacopo Franco, Anne Vandooren, Hiroaki Arimura, Lars-Ake Ragnarsson, Philippe Roussel, Ben Kaczer, Dimitri Linten, Nadine Collaert, Guido Groeseneken
Summary: This article proposes a method to improve the reliability of high-k/metal gate structures by inserting defect decoupling layers between SiO2 and HfO2. The study shows that LaSiOx has little impact on carrier mobility, while Al2O3 can improve both positive and negative BTI reliability. Furthermore, the simplified dual gate-stack integration strategy is explored, indicating that the pMOS gate-stack is more tolerant to the presence of a residual LaSiOx layer.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2022)
Article
Engineering, Electrical & Electronic
Andrea Vici, Robin Degraeve, Ben Kaczer, Jacopo Franco, Simon Van Beek, Ingrid De Wolf
Summary: A multi-energy level agnostic model and Monte Carlo simulations were used to investigate defect generation during time-dependent dielectric breakdown stress. The results showed that the growth rate of generated defects was strongly influenced by the width of the distribution of bond strengths. The breakdown time in DC and AC unipolar simulations was found to be proportional to the fluence and energy of the injected carriers.
SOLID-STATE ELECTRONICS
(2022)
Article
Engineering, Electrical & Electronic
M. Vandemaele, B. Kaczer, S. Tyaginov, J. Franco, E. Bury, A. Chasin, A. Makarov, G. Hellings, G. Groeseneken
Summary: We simulate the spatial profile of trapped charge in the forksheet FET wall under hot-carrier stress and find that the charge trapping occurs above and below the horizontal projection of the sheet. The charge profile is independent of the sheet width, and the trapping in the forksheet FET wall is significantly smaller than the trapping in the gate stack.
IEEE ELECTRON DEVICE LETTERS
(2023)
Article
Engineering, Electrical & Electronic
D. Sangani, J. Diaz-Fortuny, E. Bury, J. Franco, B. Kaczer, G. Gielen
Summary: With the increasing importance of reliability margins, product-level aging analysis has become an integral part of modern design flow. The focus has shifted towards developing physics-based compact models for transistor degradation and integrating them into EDA environments. The inclusion of compact models for transistor degradation in commercial Process Design Kits (PDKs) has also gained traction. This study presents a comprehensive analysis of compact aging models in a commercial PDK, utilizing extensive measurement data from individual devices and Ring Oscillators (RO). Model parameter shifts are extracted through full $I_{d}$ - $V_{gs}$ fitting of BTI-stressed devices, providing insight into the modeling procedure adopted by the foundry. The extracted parameters are then used to investigate the impact of time-0 and time-dependent device-to-device variability on RO degradation.
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
(2023)
Article
Engineering, Electrical & Electronic
Pietro Rinaudo, A. Chasin, J. Franco, Z. Wu, S. Subhechha, G. Arutchelvan, G. Eneman, B. Y. V. Ramana, N. Rassoul, R. Delhougne, B. Kaczer, I. De Wolf, G. S. Kar
Summary: This study investigates the impact of gate and drain stress biases combination on the degradation of IGZO based TFTs. It shows that the typical signatures of this mechanism are not visible even at high drain biases, and only a gate bias dependence is present in most of the degradation data. The study also identifies an unexpected gate-length dependence of BTI and explores different extrinsic causes.
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
(2023)
Article
Engineering, Electrical & Electronic
Dominic Waldhoer, Christian Schleich, Jakob Michl, Alexander Grill, Dieter Claes, Alexander Karl, Theresia Knobloch, Gerhard Rzepa, Jacopo Franco, Ben Kaczer, Michael Waltl, Tibor Grasser
Summary: Charge trapping is crucial for the reliability of electronic devices and can be observed in phenomena such as bias temperature instability (BTI), random telegraph noise (RTN), hysteresis, and trap-assisted tunneling (TAT). This study introduces Comphy v3.0, an open source physical framework that models these effects in a unified manner using nonradiative multiphonon theory on a one-dimensional device geometry. The paper provides an overview of the underlying theory, discusses new features in comparison to the original Comphy framework, and reviews recent advances in reliability physics enabled by these new features. Several practical examples, including defect distribution extraction, TAT modeling in high-kappa capacitors, and BTI/RTN modeling at cryogenic temperatures, highlight the usefulness of Comphy v3.0 for the reliability community.
MICROELECTRONICS RELIABILITY
(2023)
Proceedings Paper
Engineering, Multidisciplinary
Michiel Vandemaele, Ben Kaczer, Erik Bury, Jacopo Franco, Adrian Chasin, Alexander Makarov, Hans Mertens, Geert Hellings, Guido Groeseneken
Summary: We present TCAD simulation studies on the hot-carrier reliability of nanowire (NW), nanosheet (NS), and forksheet (FS) FETs. The simulations involve solving the Boltzmann transport equation, calculating interface state generation and bulk defect charging, and evaluating the impact of generated/trapped charges on FET characteristics. We discuss the models used in hot-carrier simulation flows, anneal measurements, and validate the simulation models by comparing with NW FET measurements, providing insights for NS and FS FETs.
2023 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, IRPS
(2023)
Proceedings Paper
Engineering, Multidisciplinary
E. Bury, M. Vandemaele, J. Franco, A. Chasin, S. Tyaginov, A. Vandooren, R. Ritzenthaler, H. Mertens, J. Diaz Fortuny, N. Horiguchi, D. Linten, B. Kaczer
Summary: This study summarizes the time-0 and time-dependent performance of n and p-type FSH field-effect transistors, as well as the separate assessment of NSH chips. Additionally, the impact of using a bottom dielectric isolation instead of junction-based electrical isolation is evaluated.
2023 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, IRPS
(2023)
Article
Engineering, Electrical & Electronic
J. Franco, H. Arimura, J. -f. de Marneffe, S. Brus, R. Ritzenthaler, K. Croes, B. Kaczer, Naoto Horiguchi
Summary: This article discusses the impact of novel low-temperature atomic hydrogen and oxygen treatments on gate stack properties. Various low thermal budget replacement gate (RMG) stacks are evaluated and benchmarked against high-temperature RMG and gate-first counterparts. Results show that the atomic hydrogen treatment improves both pMOS and nMOS device performance and reliability, making it a complete solution for low thermal budget CMOS.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2023)
Proceedings Paper
Engineering, Electrical & Electronic
Z. Wu, A. Chasin, J. Franco, S. Subhechha, H. Dekkers, Y. V. Bhuvaneshwari, A. Belmonte, N. Rassoul, M. J. van Setten, V. Afanas'ev, R. Delhougne, B. Kaczer, G. S. Kar
Summary: The sub-gap Density-of-State (DoS) in IGZO thin-film transistors (TFT) is systematically investigated using a newly developed Light-assisted I-V Spectroscopy (LaIVs). The technique quantifies the changes in sub-gap DoS during electrical stress, and decouples the effects of charge trapping and gate-dielectric defects. The kinetics and acceleration factors of the sub-gap DoS are extracted, allowing for projection of I-V degradations under different stress conditions.
2022 INTERNATIONAL ELECTRON DEVICES MEETING, IEDM
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
R. Asanovski, A. Grill, J. Franco, P. Palestri, A. Beckers, B. Kaczer, L. Selmi
Summary: This research characterizes and analyzes the origin of 1/f noise at low temperatures, and identifies disorder-induced states in the channel as possible causes.
2022 INTERNATIONAL ELECTRON DEVICES MEETING, IEDM
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
J. Franco, H. Arimura, J. -F. de Marneffe, D. Claes, S. Brus, A. Vandooren, E. Dentoni Litta, N. Horiguchi, K. Croes, B. Kaczer
Summary: In this paper, a low temperature atomic oxygen treatment is demonstrated to improve the electron trap density in HfO2 and the PBTI in RMG stacks. It is combined with a previously demonstrated low temperature atomic hydrogen treatment for a complete BTI solution compatible with Sequential 3D integration and tightly spaced nanosheet stacks.
2022 INTERNATIONAL ELECTRON DEVICES MEETING, IEDM
(2022)
Proceedings Paper
Engineering, Multidisciplinary
V. Putcha, H. Yu, J. Franco, S. Yadav, A. Alian, U. Peralagu, B. Parvais, N. Collaert
Summary: This work reveals that the complex dynamic-R-ON characteristics observed in scaled GaN HEMT devices are caused by the similar capture/emission properties of defects in different epitaxial layers. The study also presents an optimized experimental scheme for analyzing the charge-trapping mechanisms in GaN-on-Si HEMTs, describes the charge-trapping kinetics at various temperatures using capture/emission time (CET) maps, and models the energy distribution of defects in the AlGaN barrier.
2022 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)
(2022)
Proceedings Paper
Engineering, Multidisciplinary
Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Erik Bury, Adrian Chasin, Jacopo Franco, Alexander Makarov, Hans Mertens, Geert Hellings, Guido Groeseneken
Summary: Forksheet (FS) FETs are a new transistor architecture that utilizes vertically stacked nFET and pFET sheets with a dielectric wall, reducing p-to-n separation. Hot-carrier degradation (HCD) simulations show that both FS FETs and NS FETs can reduce HCD with increasing sheet width when considering interface state generation. Furthermore, an initial assessment suggests that the impact of oxide defect charging in the FS wall can be controlled under operating conditions.
2022 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Kristof Croes, Veerle Simons, Brecht Truijen, Philippe Roussel, Koen Van Sever, Artemisia Tsiara, Jacopo Franco, Philippe Absil
Summary: The degradation mechanisms of dark current in Ge VPIN photodetectors were investigated, and a methodology for estimating failure percentages was developed and applied. The degradation/recovery processes and the decrease of E-a in I-dark after stress suggest an increased trap-assisted tunneling during degradation.
2022 OPTICAL FIBER COMMUNICATIONS CONFERENCE AND EXHIBITION (OFC)
(2022)
