Article
Chemistry, Multidisciplinary
Ke-Jing Lee, Wei-Shao Lin, Li-Wen Wang, Hsin-Ni Lin, Yeong-Her Wang
Summary: This paper presents a sol-gel process-prepared SrZrTiO3 (SZT) thin film for the insulator of resistive random-access memory (RRAM). Aluminum (Al) was embedded in the SZT thin film to enhance the switching characteristics. The RRAM with embedded Al in SZT thin film showed significant improvements in device parameters compared to pure SZT thin-film RRAM.
Article
Chemistry, Physical
Km Komal, Govind Gupta, Mukhtiyar Singh, Bharti Singh
Summary: The resistive switching performance of reduced graphene oxide (RGO) and tin oxide (SnO2) based nanocomposite has been investigated in this study. The nanocomposite showed improved resistive switching compared to pure SnO2 film, with reduced operating voltage and enhanced resistance ratio. The fabricated composite film-based device exhibited good retention and endurance behavior. These findings suggest great potential for future non-volatile memory devices.
JOURNAL OF ALLOYS AND COMPOUNDS
(2022)
Article
Engineering, Electrical & Electronic
Erika Covi, Wei Wang, Yu-Hsuan Lin, Matteo Farronato, Elia Ambrosi, Daniele Ielmini
Summary: This article presents an extensive study of volatile resistive switching random access memory (RRAM) devices, focusing on the characterization of the electrical properties of Ag/SiOx-based devices and discussing their applicability in neuromorphic systems.
IEEE TRANSACTIONS ON ELECTRON DEVICES
(2021)
Article
Materials Science, Multidisciplinary
Ilias A. Tayeb, Feng Zhao, Jafri M. Abdullah, Kuan Y. Cheong
Summary: The study demonstrates the potential of polymannose as a candidate material for environmentally friendly resistive-switching random access memory, showing competitive resistive switching characteristics with a READ window of 2.2 V. The optimal drying time of 7 hours provided high ON/OFF ratio and acceptable endurance cycles.
JOURNAL OF MATERIALS CHEMISTRY C
(2021)
Article
Chemistry, Physical
Guanglei Zhang, Yanqing Xu, Shuai Yang, Shuxia Ren, Yinan Jiao, Ye Wang, Xuena Ma, Hao Li, Weizhong Hao, Caili He, Xiaomin Liu, Jinjin Zhao
Summary: Metal halide perovskites are attracting attention for use in flexible resistive random access memory (RRAM) due to their good photoelectric regulation, high ON/OFF ratios, and low fabrication costs. In this study, mica/silver nanowires welded with aluminum-doped zinc oxide (mica/AgNWs@AZO) substrates were successfully fabricated, providing high-temperature resistance, high flexibility, high conductivity, and good stability. The mica/AgNWs@AZO substrate showed better performance compared to a commercial PET/ITO substrate, and the perovskite CsPbBr3 nanocrystal (NC) RRAM constructed on the mica/AgNWs@AZO substrate exhibited improved ON/OFF ratios under bending cycles.
Article
Engineering, Electrical & Electronic
Chih-Ying Chen, Yu-Hsiu Feng, Hong-Lin Lu, Feng-En Chang, Jui-Yuan Chen
Summary: In this study, an integrated structure called one phase-change memory one resistive random access memory (1P1R) was proposed to suppress the sneak current during stacking. The 1P1R device remained in a high resistance state to suppress the sneak current, and switched to a working state to write/read its state. The feasibility of the 1P1R structure was confirmed through electrical measurement, and the property analysis provided insight into its speculated mechanism. The results demonstrated that the novel 1P1R structure could effectively suppress sneak current, showing potential for 3D IC manufacturing.
ACS APPLIED ELECTRONIC MATERIALS
(2023)
Article
Engineering, Electrical & Electronic
S. Blonkowski, M. Labalette, S. Jeannot, S. Ecoffey, A. Souifi, D. Drouin
Summary: In this study, a physical model of complementary resistive switching (CRS) based on the disruption and reformation process of a metallic filament inside each Oxyde Resistive Random Access Memory (OxRRAM) composing the CRS is proposed. The driving forces involved in this process include electromigration forces, electron phonon coupling, and joule heating. The model accurately accounts for the experimental CRS current voltage characteristics, and stability of CRS states and operation in pulse regime are discussed.
SOLID-STATE ELECTRONICS
(2021)
Article
Chemistry, Physical
Seung Woo Han, Moo Whan Shin
Summary: This study fabricates a high-performance flexible RRAM device using a precisely controlled UV laser annealing process, which changes the concentration of O Frenkel defect pairs in the ZnO layer and produces a ZnO/Al mixed interface layer with high quality oxygen reservoirs. The laser-annealed flexible RRAM shows stable resistive switching, performance enhancement, high on/off ratio, cycling endurance, and low power consumption, even at a bending radius of up to 5 mm.
JOURNAL OF ALLOYS AND COMPOUNDS
(2022)
Article
Chemistry, Multidisciplinary
Manasa Kaniselvan, Mathieu Luisier, Marko Mladenovic
Summary: In valence change memory (VCM) cells, the conductance of an insulating switching layer is modulated by creating and redistributing point defects. However, accurately simulating the switching dynamics of these devices is challenging due to their disordered atomic structures. To address this, researchers have developed an atomistic framework combining stochastic kinetic Monte Carlo and quantum transport schemes. This model allows for a direct understanding of the energy landscape and electronic structure of the device, enabling simulations of field-induced switching and analysis of conductance transitions.
Article
Materials Science, Multidisciplinary
Karuna Kumari, Ashutosh Kumar, Ajay D. Thakur, S. J. Ray
Summary: Researchers studied a novel hybrid structure of oxide-based non-volatile memory elements with reduced graphene oxide, demonstrating stable and robust bipolar resistive switching behavior. Additional tunability was achieved through varying the rGO concentration, resulting in a clear observation of a metal to insulator transition. The combined attributes of easy fabrication, robust switching behavior, and environmental stability make this system a superior candidate for future non-volatile memory design and oxide electronics.
MATERIALS RESEARCH BULLETIN
(2021)
Article
Materials Science, Multidisciplinary
Hassan Algadi, Chandreswar Mahata, Turki Alsuwian, Muhammad Ismail, Daewoong Kwon, Sungjun Kim
Summary: A RRAM device was fabricated using Pt-NPs deposited by atomic layer deposition, showing controlled filament formation and multilevel conductance, achieving excellent resistive switching properties. Potentiation/depression characteristics were successfully demonstrated by applying increasing voltage pulses, indicating the device's learning potential.
Article
Chemistry, Physical
Seung Woo Han, Chul Jin Park, Moo Whan Shin
Summary: This study demonstrates that the diffusion of aluminum atoms and oxygen vacancies significantly affect the resistive switching behavior of zinc oxide-based random resistive access memory (RRAM). The diffusion of aluminum atoms into the zinc oxide layer acts as dopants, producing additional oxygen vacancies and contributing to the formation of conductive filaments. Additionally, the formation of an aluminum oxide layer by the redox reaction between aluminum atoms and oxygen leads to the instability of the reset process.
SURFACES AND INTERFACES
(2022)
Article
Chemistry, Analytical
Marek Vidis, Michal Patrnciak, Martin Mosko, Andrej Plecenik, Leonid Satrapinskyy, Tomas Roch, Pavol Durina, Tomas Plecenik
Summary: This study examines the coexistence of hydrogen gas sensing and resistive switching in a single device, investigates the influence of the forming process on the sensor's response to hydrogen, and proposes an equivalent device model based on experimental data. The built-in memory operation, triggering the resistive switch by a change of the hydrogen gas concentration, is successfully demonstrated for various devices at different temperatures and humidity levels.
SENSORS AND ACTUATORS B-CHEMICAL
(2023)
Article
Chemistry, Multidisciplinary
Tsz-Lung Ho, Keda Ding, Nikolay Lyapunov, Chun-Hung Suen, Lok-Wing Wong, Jiong Zhao, Ming Yang, Xiaoyuan Zhou, Ji-Yan Dai
Summary: This study reports on the multilevel resistive switching characteristics in SnSe/STO heterojunction-based memory devices, demonstrating reliable and stable bipolar resistive switching. By using different electrode conditions, multilevel state switching ability is achieved, providing a potential solution for the application of synaptic devices in neuromorphic computing.
Review
Physics, Multidisciplinary
Xiao-Xin Xu, Qing Luo, Tian-Cheng Gong, Hang-Bing Lv, Qi Liu, Ming Liu
Summary: This article provides a comprehensive review on the progress achieved concerning the integration of 3D RRAM, including the problems in passive arrays and the categories of 3D architectures, the development of various selector devices and self-selective cells, key parameters influencing device nonlinearity and current density, as well as reliability issues, scaling issues, thermal crosstalk, and applications beyond storage.
Article
Engineering, Electrical & Electronic
J. Minguet Lopez, T. Hirtz, M. Dampfhoffer, L. Grenouillee, L. Reganaz, G. Navarro, C. Carabasse, E. Vianello, T. Magis, D. Deleruyelle, M. Bocquet, J. M. Portal, F. Andrieu, G. Molas
Summary: This study aims to improve the speed and power consumption of deep learning accelerators by using low-power memristive devices and proposes a denser 1S1R crossbar system. The research achieves successful experimental results and simulations.
SEMICONDUCTOR SCIENCE AND TECHNOLOGY
(2022)
Article
Computer Science, Hardware & Architecture
Halima Najibi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, Miroslav Vasic, David Atienza
Summary: Flow cell arrays (FCAs) provide efficient on-chip liquid cooling and electrochemical power generation, which is particularly beneficial for 3-D multiprocessor systems-on-chip (3-D MPSoCs) with challenging power and thermal requirements. FCAs improve power delivery network performance and enable voltage drop recovery across dies, resulting in increased computing performance. A novel temperature and voltage-aware model-predictive control strategy further optimizes power efficiency during runtime. These advancements have demonstrated significant temperature reduction and power consumption decrease in heterogeneous 3-D MPSoCs.
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
(2023)
Article
Engineering, Electrical & Electronic
H. Aziza, J. Postel-Pellerin, M. Moreau
Summary: This paper proposes a novel characterization methodology for rapid detection of RRAM reliablity issues and introduces a test structure for endurance tests. By monitoring the electrical parameters of RRAM, the endurance can be accurately evaluated, and a mitigation scheme is presented for reducing endurance failures.
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
(2022)
Article
Computer Science, Information Systems
Marco Rios, Flavio Ponzina, Alexandre Levisse, Giovanni Ansaloni, David Atienza
Summary: Bit-line Computing (BC) architectures enable parallel execution of bit-wise operations in-memory, resulting in efficient arithmetic operations at the array periphery. This paradigm offers new opportunities for edge AI with its inherent parallelism and energy efficiency. This manuscript proposes a framework that leverages BC optimizations to enable high parallelism and aggressive compression of AI models, resulting in significant energy savings compared to state-of-the-art BC computing approaches.
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING
(2023)
Article
Computer Science, Information Systems
Hassan Aziza, Jeremy Postel-Pellerin, Mathieu Moreau
Summary: This paper evaluates the conductance modulation of Oxide-based RAM (OxRAM) devices based on experimental data, revealing its inherent analog synaptic behavior. A test chip made of a classical 1T-1R elementary memory array is used to demonstrate the conductance modulation. Two different programming techniques are used, and it is shown that the success of a reliable conductance modulation scheme depends on the precise control of the impact of variability on the different conductance levels.
Article
Engineering, Electrical & Electronic
Kamel-Eddine Harabi, Tifenn Hirtzlin, Clement Turck, Elisa Vianello, Raphael Laurent, Jacques Droulez, Pierre Bessiere, Jean-Michel Portal, Marc Bocquet, Damien Querlioz
Summary: Researchers report a memristor-based Bayesian machine that implements Bayes' law using principles of distributed memory and stochastic computing, enabling the circuit to operate solely using local memory and minimal data movement. A prototype circuit with 2,048 memristors and 30,080 transistors is fabricated, showing higher energy efficiency in a practical gesture recognition task compared to a standard implementation of Bayesian inference on a microcontroller unit.
NATURE ELECTRONICS
(2023)
Article
Engineering, Electrical & Electronic
Silvio Zanoli, Flavio Ponzina, Tomas Teijeiro, Alexandre Levisse, David Atienza
Summary: Event-based sensors have the potential to optimize energy consumption in various stages of signal processing. This study introduces a Polygonal Approximation Sampler (PAS) circuit that implements a general-purpose event-based sampler using a polygonal approximation algorithm. The circuit can be adjusted to produce either coarse or detailed analog input reconstructions. The PAS has been tested with different types of signals and shows significant reduction in data usage without compromising performance. These results pave the way for wearable sensors with smaller size and longer battery life.
IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
(2023)
Article
Computer Science, Hardware & Architecture
Joshua Klein, Irem Boybat, Yasir Mahmood Qureshi, Martino Dazzi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, Abu Sebastian, David Atienza
Summary: Analog in-memory computing (AIMC) cores offer better performance and energy efficiency for neural network inference compared to digital logic(CPUs). However, AIMC-centric platforms lack flexibility and can only support a limited set of processing functions. To bridge this flexibility gap, we propose a novel system architecture that integrates analog in-memory computing accelerators into multi-core CPUs in general-purpose systems.
IEEE TRANSACTIONS ON COMPUTERS
(2023)
Proceedings Paper
Automation & Control Systems
K. -E. Harabi, C. Turck, M. Drouhin, A. Renaudineau, T. Bersani--Veroni, D. Querlioz, T. Hirtzlin, E. Vianello, M. Bocquet, J. -M. Portal
Summary: We have developed an integrated circuit that combines CMOS and hafnium-oxide memristor technology, serving as a prototyping platform for memristor-related projects. The circuit includes both peripheral circuitry for using memristors in digital circuits, and an analog mode with direct access to memristors. This platform allows for optimizing the conditions of reading and writing memristors, as well as the development and testing of innovative memristor-based neuromorphic concepts.
2023 28TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, ASP-DAC
(2023)
Proceedings Paper
Computer Science, Hardware & Architecture
Tifenn Hirtzlin, Thomas Dalgaty, Marc Bocquet, Jean-Michel Portal, Jacques-Olivier Klein, Clement Turck, Kamel-Eddine Harabi, Damien Querlioz, Elisa Vianello
Summary: This article introduces two methods for energy-efficient hardware implementation using resistive memory technology. One method is to use binarized neural networks that are resilient to errors and operate at low energy consumption. The other method is to utilize memristor variability to implement Markov chain Monte Carlo sampling configured as a Bayesian machine learning model. The research demonstrates the robustness of these methods to device variability and degradation, and based on simulations, the total energy consumption for classification and model training is estimated to be two orders of magnitude lower than CMOS-based approaches.
2022 INTERNATIONAL CONFERENCE ON IC DESIGN AND TECHNOLOGY (ICICDT)
(2022)
Proceedings Paper
Engineering, Multidisciplinary
E. Esmanhotto, T. Hirtzlin, N. Castellani, S. Martin, B. Giraud, F. Andrieu, J. F. Nodin, D. Querlioz, J-M. Portal, E. Vianello
Summary: This article demonstrates a resilient RRAM-based in-memory computing logic concept, showing strong resilience to RRAM variability even after numerous endurance cycles. The work achieves a new milestone in the field of RRAM in-memory logic and presents the first experimental evidence of an RRAM-based MLC 2-bit adder.
2022 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
Vincenzo Della Marca, Julien Guilleau-Tavernier, Pierre Laine, Franck Melul, Marc Bocquet, Thibault Kempf, Loic Welter, Jean-Michel Moragues, Arnaud Regnier, Jean-Michel Portal
Summary: This paper presents a full free addressable 4kb EEPROM memory array. The structure uses flexible addressing logic and column/row shift registers to bias cells for electrical characterization, resulting in improved efficiency in an electrical characterization laboratory.
2022 IEEE 34TH INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS)
(2022)
Proceedings Paper
Engineering, Electrical & Electronic
F. Jebali, E. Muhr, M. Alayan, M. C. Faye, D. Querlioz, F. Andrieu, E. Vianello, G. Molas, M. Bocquet, J. M. Portal
Summary: This paper presents an embedded measurement circuit dedicated to extracting the SET switching time of RRAM memory cells. The design and operation of the measurement circuit, as well as the test setup and conditions, are described in detail. The results show that the resistance and SET switching time values obtained using this circuit are consistent with those obtained through heavy waveguide measurement setups in the literature.
2022 IEEE 34TH INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS)
(2022)
Proceedings Paper
Computer Science, Hardware & Architecture
J. Minguet Lopez, F. Rummens, L. Reganaz, A. Heraud, T. Hirtzlin, L. Grenouillet, G. Navarro, M. Bernard, C. Carabasse, N. Castellani, V Meli, S. Martin, T. Magis, E. Vianello, C. Sabbione, D. Deleruyelle, M. Bocquet, J. M. Portal, G. Molas, F. Andrieu
Summary: This study experimentally validates the sub-threshold reading strategy in OxRAM+OTS crossbar arrays for low precision inference in Binarized Neural Networks. Through an experimental and theoretical study, the sub-threshold current margin in 1S1R stacked HfO2-based devices with various OTS technologies is optimized. The accuracy and power consumption of a Binarized Neural Network designed in 28nm CMOS are estimated with Monte Carlo simulations.
2022 14TH IEEE INTERNATIONAL MEMORY WORKSHOP (IMW 2022)
(2022)
Proceedings Paper
Computer Science, Hardware & Architecture
G. Molas, G. Piccolboni, A. Bricalli, A. Verdy, I Naot, Y. Cohen, A. Regev, I Naveh, D. Deleruyelle, Q. Rafhay, N. Castellani, L. Reganaz, A. Persico, R. Segaud, J. F. Nodin, V Meli, S. Martin, F. Andrieu, L. Grenouillet
Summary: This study reports the performances and reliability of ReRAM technology integrated in the 28nm node. The technology achieved low raw BER and showed good endurance with stable memory window even after high temperature baking.
2022 14TH IEEE INTERNATIONAL MEMORY WORKSHOP (IMW 2022)
(2022)
