期刊
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING
卷 11, 期 3, 页码 817-821出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TETC.2023.3280470
关键词
Lattice-based cryptography; binary ring LWE (ring-bin LWE); hardware implementation; end-node devices
This article presents a lightweight hardware implementation of the lattice-based encryption technique Ring-Bin LWE, which reduces latency by half through the introduction of a new multiplication method and design. The implementation results show impressive improvements in execution time and Area-Time metrics compared to previous similar works.
Providing end-to-end security is vital for most networks. Emerging quantum computers make it necessary to design secure crypto-systems against quantum attacks. Binary Ring Learning With Error (Ring-Bin LWE) is a Lattice-based cryptography that is hard to solve by quantum computers. Also, this algorithm does not have costly operations in terms of area, making Ring-Bin LWE a suitable algorithm for resource-constraint devices. This work presents a lightweight hardware implementation of Ring-Bin LWE. In the proposed design, a new multiplication method and design for Ring-Bin LWE is introduced which results in latency reduction by a factor of two. Using column-based multiplication, our design processes two consecutive coefficients in each cycle. The architecture is designed based on the proposed multiplication and contains one specific register bank with two sub-bank registers. The design is implemented on the FPGA platforms. The implementation results show an impressive improvement in execution time and Area-Time metrics over previous similar works.
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