标题
Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance
作者
关键词
-
出版物
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Volume 31, Issue 11, Pages 1763-1773
出版商
Institute of Electrical and Electronics Engineers (IEEE)
发表日期
2023-09-02
DOI
10.1109/tvlsi.2023.3306894
参考文献
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- (2023) Weixiong Jiang et al. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
- Saca-FI: A microarchitecture-level fault injection framework for reliability analysis of systolic array based CNN accelerator
- (2023) Jingweijia Tan et al. Future Generation Computer Systems-The International Journal of eScience
- Design possibilities and challenges of DNN models: a review on the perspective of end devices
- (2022) Hanan Hussain et al. ARTIFICIAL INTELLIGENCE REVIEW
- A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues
- (2022) Sepideh Safari et al. IEEE Access
- Bit-Aware Fault-Tolerant Hybrid Retraining and Remapping Schemes for RRAM-Based Computing-in-Memory Systems
- (2022) Yuxuan Huang et al. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture
- (2021) Xuefei Ning et al. ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS
- SNR: S queezing N umerical R ange Defuses Bit Error Vulnerability Surface in Deep Neural Networks
- (2021) Elbruz Ozen et al. ACM Transactions on Embedded Computing Systems
- R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors
- (2021) Dawen Xu et al. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
- Model Compression and Hardware Acceleration for Neural Networks: A Comprehensive Survey
- (2020) By Lei Deng et al. PROCEEDINGS OF THE IEEE
- Robust Machine Learning Systems: Challenges,Current Trends, Perspectives, and the Road Ahead
- (2020) Muhammad Shafique et al. IEEE Design & Test
- A survey on modeling and improving reliability of DNN algorithms and accelerators
- (2019) Sparsh Mittal JOURNAL OF SYSTEMS ARCHITECTURE
- Toward an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2-D and 3-D CNNs on FPGA
- (2019) Junzhong Shen et al. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
- Regularizing Multilayer Perceptron for Robustness
- (2018) Prasenjit Dey et al. IEEE Transactions on Systems Man Cybernetics-Systems
- Selective Hardening for Neural Networks in FPGAs
- (2018) F. Libano et al. IEEE TRANSACTIONS ON NUCLEAR SCIENCE
- CMOS Scaling Trends and Beyond
- (2017) Mark T. Bohr et al. IEEE MICRO
- Fault and Error Tolerance in Neural Networks: A Review
- (2017) Cesar Torres-Huitzil et al. IEEE Access
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