Hardware Implementation of a High-Speed Adaptive Filter Using a Combination of Systolic and Convex Architectures

标题
Hardware Implementation of a High-Speed Adaptive Filter Using a Combination of Systolic and Convex Architectures
作者
关键词
-
出版物
CIRCUITS SYSTEMS AND SIGNAL PROCESSING
Volume -, Issue -, Pages -
出版商
Springer Science and Business Media LLC
发表日期
2023-11-06
DOI
10.1007/s00034-023-02539-4

向作者/读者发起求助以获取更多资源

Add your recorded webinar

Do you already have a recorded webinar? Grow your audience and get more views by easily listing your recording on Peeref.

Upload Now

Become a Peeref-certified reviewer

The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.

Get Started