期刊
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
卷 11, 期 -, 页码 54-59出版社
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JEDS.2023.3235386
关键词
Silicon; Germanium; Oxidation; Fabrication; Electrodes; Logic gates; Reservoirs; Ge; quantum dot; single-hole transistors
We present the fabrication and electrical characterization of single-hole transistors (SHTs) utilizing a Ge spherical quantum dot (QD) weakly coupled to self-aligned electrodes via self-organized tunnel barriers of Si3N4. The fabrication process involves lithographic patterning, sidewall spacers, and self-assembled growth. By selectively oxidizing poly-SiGe spacer islands located at specific included-angle locations of Si3N4/Si trenches, controllable tunability of Ge QD size and tunnel-barrier widths is achieved. Each Ge QD can be electrically accessed through self-aligned Si gate and reservoirs, making it a promising building block for single-charge devices.
We report the fabrication and electrical characterization of single-hole transistors (SHTs), in which a Ge spherical quantum dot (QD) weakly couples to self-aligned electrodes via self-organized tunnel barriers of Si3N4. A combination of lithographic patterning, sidewall spacers, and self-assembled growth was used for fabrication. The core experimental approach is based on the selective oxidation of poly-SiGe spacer islands located at the specially designed included-angle locations of Si3N4/Si-trenches. By adjusting processing times for conformal deposition, etch back and thermal oxidation, good tunability in the Ge QD size and its tunnel-barrier widths were controllably achieved. Each Ge QD is electrically addressable via self-aligned Si gate and reservoirs, thus offering an effective building block for implementing single-charge devices.
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