The CTH Network: An NoC Platform for Scalable and Energy Efficient Application Mapping Solution

The Exascale Era is Upon Us: The Frontier supercomputer may be the first to reach 1,000,000,000,000,000,000 operations per second

(2022) David Schneider   IEEE SPECTRUM

Design and evaluation of ZMesh topology for on-chip interconnection networks

(2018) N. Prasad et al.   JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING

A novel adaptive congestion-aware and load-balanced routing algorithm in networks-on-chip

(2018) Ehsan Khodadad et al.   COMPUTERS & ELECTRICAL ENGINEERING

A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs

(2018) Andreas Weichslgartner et al.   ACM Transactions on Embedded Computing Systems

KL_GA: an application mapping algorithm for mesh-of-tree (MoT) architecture in network-on-chip design

(2015) Juan Fang et al.   JOURNAL OF SUPERCOMPUTING

An Evaluation of High-Level Mechanistic Core Models

(2014) Trevor E. Carlson et al.   ACM Transactions on Architecture and Code Optimization

A survey on application mapping strategies for Network-on-Chip design

(2012) Pradip Kumar Sahu et al.   JOURNAL OF SYSTEMS ARCHITECTURE

Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms

(2010) Amit Kumar Singh et al.   JOURNAL OF SYSTEMS ARCHITECTURE