Demonstration of Anti-ambipolar Switch and Its Applications for Extremely Low Power Ternary Logic Circuits
出版年份 2022 全文链接
标题
Demonstration of Anti-ambipolar Switch and Its Applications for Extremely Low Power Ternary Logic Circuits
作者
关键词
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出版物
ACS Nano
Volume 16, Issue 7, Pages 10994-11003
出版商
American Chemical Society (ACS)
发表日期
2022-06-29
DOI
10.1021/acsnano.2c03523
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注意:仅列出部分参考文献,下载原文获取全部文献信息。- Micron channel length ZnO thin film transistors using bilayer electrodes
- (2022) Sizhe Li et al. JOURNAL OF COLLOID AND INTERFACE SCIENCE
- Operation Principles of ZnO/Al 2 O 3 ‐AlDMP/ZnO Stacked‐Channel Ternary Thin‐Film Transistor
- (2021) So‐Young Kim et al. Advanced Electronic Materials
- Reconfigurable Logic‐in‐Memory and Multilingual Artificial Synapses Based on 2D Heterostructures
- (2020) Xiong Xiong et al. ADVANCED FUNCTIONAL MATERIALS
- Enhanced Performance of Atomic Layer Deposited Thin-Film Transistors With High-Quality ZnO/Al2O3 Interface
- (2020) Huijin Li et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- High-Frequency Rectifiers Based on Organic Thin-Film Transistors on Flexible Substrates
- (2020) Ghada H. Ibrahim et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- Buried Power Rail Integration With FinFETs for Ultimate CMOS Scaling
- (2020) Anshul Gupta et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- Ambipolar and anti-ambipolar thin-film transistors from edge-on small-molecule heterostructures
- (2020) Sungmin On et al. APPLIED SURFACE SCIENCE
- Study on Correlation between Structural and Electronic Properties of Fluorinated Oligothiophenes Transistors by Controlling Film Thickness
- (2019) Jui-Fen Chang et al. Crystals
- ZnO composite nanolayer with mobility edge quantization for multi-value logic transistors
- (2019) Lynn Lee et al. Nature Communications
- Graphene and two-dimensional materials for silicon technology
- (2019) Deji Akinwande et al. NATURE
- Organic-Inorganic Hybrid Halide Perovskites for Memories, Transistors, and Artificial Synapses
- (2018) Jaeho Choi et al. ADVANCED MATERIALS
- Ternary Full Adder Using Multi-Threshold Voltage Graphene Barristors
- (2018) Sunwoo Heo et al. IEEE ELECTRON DEVICE LETTERS
- Systematic modulation of negative-differential transconductance effects for gated p+-i-n+ silicon ultra-thin body transistor
- (2017) Changmin Kim et al. JOURNAL OF APPLIED PHYSICS
- Configuration-dependent anti-ambipolar van der Waals p–n heterostructures based on pentacene single crystal and MoS2
- (2017) Ji Dong et al. Nanoscale
- Multifunctional high-performance van der Waals heterostructures
- (2017) Mingqiang Huang et al. Nature Nanotechnology
- Negative Differential Resistance Transistor with Organic p-n Heterojunction
- (2017) Kazuyoshi Kobashi et al. Advanced Electronic Materials
- Transport Properties of a MoS2/WSe2 Heterojunction Transistor and Its Potential for Application
- (2016) Amirhasan Nourbakhsh et al. NANO LETTERS
- A survey and tutorial on contemporary aspects of multiple-valued logic and its application to microelectronic circuits
- (2016) Vincent Gaudet IEEE Journal on Emerging and Selected Topics in Circuits and Systems
- Demonstration of Complementary Ternary Graphene Field-Effect Transistors
- (2016) Yun Ji Kim et al. Scientific Reports
- Gate length and temperature dependence of negative differential transconductance in silicon quantum well metal-oxide-semiconductor field-effect transistors
- (2015) Clint Naquin et al. JOURNAL OF APPLIED PHYSICS
- Strong room-temperature negative transconductance in an axial Si/Ge hetero-nanowire tunneling field-effect transistor
- (2014) Peng Zhang et al. APPLIED PHYSICS LETTERS
- Unified Analytic Model for Current–Voltage Behavior in Amorphous Oxide Semiconductor TFTs
- (2014) Sungsik Lee et al. IEEE ELECTRON DEVICE LETTERS
- Combining Axial and Radial Nanowire Heterostructures: Radial Esaki Diodes and Tunnel Field-Effect Transistors
- (2013) Anil W. Dey et al. NANO LETTERS
- Coaxial nanowire resonant tunneling diodes from non-polar AlN/GaN on silicon
- (2012) S. D. Carnevale et al. APPLIED PHYSICS LETTERS
- Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs
- (2012) Supriya Karmakar et al. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
- High Current Density Esaki Tunnel Diodes Based on GaSb-InAsSb Heterostructure Nanowires
- (2011) Bahram Ganjipour et al. NANO LETTERS
- CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits
- (2009) Sheng Lin et al. IEEE TRANSACTIONS ON NANOTECHNOLOGY
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