Article
Engineering, Biomedical
Kanisorn Watcharapongvinit, Intouch Yongpanich, Woradorn Wattanapanitch
Summary: This article presents the design of a low-power ground-free (two-electrode) analog front end (AFE) for ECG acquisition. The design includes a low-power common-mode interference (CMI) suppression circuit (CMI-SC) to minimize common-mode input swing and prevent ESD diodes from turning on. The fabricated two-electrode AFE can tolerate up to 12 V-pp of CMI, consumes only 6.55 μW of power from a 1.2-V supply, and exhibits 1.67 μV-rms of input-referred noise in a 1-100 Hz bandwidth, providing a 3x reduction in power compared to existing works.
IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
(2023)
Article
Engineering, Biomedical
Samprajani Rout, Bert Monna, Fabio Pareschi, Gianluca Setti, Wouter A. Serdijn
Summary: This article proposes a spread-spectrum modulated biosignal acquisition system for ambulatory or invasive medical applications with a high channel count. The system reduces power consumption, area consumption, and outgoing wire count by using a shared amplifier and an analog-to-digital converter (ADC). The proposed method is tested on real pre-recorded atrial electrograms and achieves good performance.
IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
(2023)
Article
Engineering, Electrical & Electronic
Wentao Han, Qi Yu, Kejun Wu, Zhong Zhang, Jing Li, Ning Ning
Summary: This paper presents a programmable low power and low noise analog front-end (AFE) for electrocardiogram (ECG) signal acquisition. A novel capacitor-coupled instrumentation amplifier (CCIA) with independent biasing technique and AC coupling to signal source is proposed. The AFE achieves an area-efficient programmable low pass filter (PLPF) under PVT variations using current steering technology (CST) and programmable feedback capacitors. Post-simulation results show good performance in terms of input impedance, noise density, and CMRR. The power consumption of the whole AFE is 48 µW.
MICROELECTRONICS JOURNAL
(2023)
Article
Engineering, Electrical & Electronic
Yushi Chen, Hualian Tang, Zhiyuan Wang, Peng Xu, Yiqi Zhuang
Summary: In this paper, a programmable low-power analog front-end (AFE) integrated circuit (IC) for biomedical signal monitoring systems is proposed. It consists of instrumentation amplifiers (IA), programmable gain amplifiers (PGA), programmable bandwidth filters (PBF), and successive approximation register analog-to-digital convertors (SAR ADC). The design employs various techniques, such as pseudo-differential structure, hybrid bandwidth extension, current steering technology, and self-calibration dynamic element matching, to achieve high performance and low power consumption. The AFE IC consumes only 46.8μW and occupies 0.36mm² in 0.18μm CMOS technology.
CIRCUITS SYSTEMS AND SIGNAL PROCESSING
(2023)
Article
Computer Science, Information Systems
Jingchao Lan, Danfeng Zhai, Yongzhen Chen, Zhekan Ni, Xingchen Shen, Fan Ye, Junyan Ren
Summary: This paper presents a 2.5-GS/s 12-bit four-way time-interleaved pipelined-SAR ADC in 28-nm CMOS, utilizing a bias-enhanced ring amplifier, high linearity front-end design, and calibration techniques to achieve competitive performance at 250 MHz input frequency. The prototype ADC achieves a low-frequency SNDR/SFDR of 51.0/68.0 dB, with a FoM(w) of 0.48 pJ/conv.-step.
Article
Engineering, Biomedical
Hui Wu, Jinbo Chen, Xing Liu, Wenjun Zou, Jie Yang, Mohamad Sawan
Summary: This article introduces a fully integrated configurable analog front-end (CAFE) sensor that can accommodate various types of bio-potential signals. The CAFE consists of an AC-coupled chopper-stabilized amplifier to reduce 1/f noise and a tunable filter to adjust the interface to different bandwidths. The proposed design has a high gain, low noise, and low distortion, making it suitable for different applications.
IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
(2023)
Article
Computer Science, Information Systems
Udari Gnaneshwara Chary, Kakarla Hari Kishore
Summary: With the increasing use of portable devices, Electro Cardiogram (ECG) plays a vital role in the medical field as an important emergency medical portable system. However, the excessive contact impedance of electrodes leads to an increase in power dissipation in the data acquisition system. This paper proposes a CMOS 12 lead ECG data acquisition circuit based on analog multiplexers to address this issue.
Article
Engineering, Electrical & Electronic
Xiahan Zhou, Enhan Mai, Michael Sveiven, Corentin Pochet, Haowei Jiang, Chih-Cheng Huang, Drew A. Hall
Summary: This article presents a low-noise magnetic sensor front-end with an 18-bit Zoom ADC for detecting temporal magnetic nanoparticle relaxation. Utilizing techniques like dynamic element matching and magnetoresistive correlated double sampling, it achieves state-of-the-art noise performance and a significantly improved figure-of-merit compared to previous sensor and AFE designs. Implemented in a 0.18um CMOS process, the design consumes 4.32mW from a 1.8V supply.
IEEE JOURNAL OF SOLID-STATE CIRCUITS
(2021)
Article
Computer Science, Information Systems
Gaolei Zhou, Xurui Mao, Sheng Xie, Haocheng Cai
Summary: This paper presents a 4-channel, 100 Gbps inductorless optical receiver analog front-end fabricated in a 55 nm bulk-CMOS technology. Active feedback technique, common gate amplifier, and multistage limiting amplifier are employed to improve performance, achieving high bandwidth and gain while saving space.
Article
Engineering, Electrical & Electronic
Cameron Huang, Jeffrey F. Bonner-Stewart, Steven Eugene Turner, Renyuan Wang
Summary: This paper presents a 40 GS/s monobit analog-to-digital converter (ADC) that is capable of detecting RF signals in a 2-20 GHz bandwidth. The converter offers high sensitivity and dynamic range, and is power efficient.
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
(2023)
Article
Computer Science, Information Systems
Yating Yang, Zheng Li, Mingyang Liu, Wei Liu, Zhenming Li, Ying Hou, Xin Liu, Xiaosong Wang, Yu Liu
Summary: This article introduces a wide-range and high-precision analog front-end circuit that can handle different types of sensor outputs. It proposes a rail-to-rail baseline compensation method and incorporates fine offset elimination for improved precision. By integrating self-zeroing and correlated double-sampling techniques, low-frequency noise and offset are reduced, and the linearity of the circuit is enhanced. Test results show significant total conversion gains and high conversion linearity.
Article
Engineering, Electrical & Electronic
Yuefeng Cao, Shumin Zhang, Tianli Zhang, Yongzhen Chen, Yutong Zhao, Chixiao Chen, Fan Ye, Junyan Ren
Summary: This paper introduces a single-coarse dual-fine ADC architecture to enhance energy-efficiency by optimizing quantization and residue generation processes. The proposed digital background calibration and dynamic amplifier further improve performance, leading to significant enhancements in signal-to-noise ratio and distortion characteristics in measurement.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
(2021)
Article
Computer Science, Information Systems
Paolo Crovetti, Francesco Musolino
Summary: This paper addresses the susceptibility of an analog signal acquisition front-end (AFE) to Electromagnetic Interference (EMI) in opamp-based pre-conditioning amplifiers. It discusses the possibility to correct EMI-induced errors in the digital domain through post-processing of acquired digital waveforms, and demonstrates this method experimentally for the first time. Experimental characterization in the presence of continuous wave and amplitude modulated EMI shows the superior immunity to EMI of the proposed AFE and the robustness of the approach.
Article
Computer Science, Hardware & Architecture
Heng Zhang, Ben He, Xuan Guo, Danyu Wu, Xinyu Liu
Summary: This article proposes a deep-pipelined analog-to-digital converter (ADC) utilizing an input-split fully differential ring amplifier (RAMP). The implemented RAMP achieves higher speed and adaptability in low-voltage, deep-nanoscale advanced CMOS processes. The fabricated 1-GS/s 12-bit ADC based on the RAMP achieves high performance with low power consumption in a 28-nm CMOS process.
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
(2023)
Article
Engineering, Electrical & Electronic
Jiannan Huang, Patrick P. Mercier
Summary: The design utilizes DPCM compression theory to substantially reduce the signal amplitude incident to the VCO quantizer, achieving ultra-low THD. Background digital gain calibration and dynamic element matching (DEM) techniques ensure robustness and high efficiency in achieving a high DR.
IEEE JOURNAL OF SOLID-STATE CIRCUITS
(2021)
