PSO-based Power-Driven X-Routing Algorithm in semiconductor design for predictive intelligence of IoT applications

As the Internet of Things (IoT) becomes more and more intelligent, a new computing paradigm, predictive intelligence is incorporated into many IoT applications. The devices of predictive intelligence in IoT applications must consider the power and delay consumption. As the Power-Driven X-Routing (PDXR) problem model under the advanced semiconductor design, the length-restricted condition in the multi-dynamic voltage model is introduced to save power consumption and the X-architecture is introduced to better reduce the wirelength to optimize the chip delay. To this end, an effective particle swarm optimization-based power-driven length-restricted X-routing algorithm is proposed for predictive intelligence in IoT applications. Firstly, a pre-calculated lookup table is designed to provide fast information query for the subsequent algorithm flow. Secondly, an improved particle swarm optimization algorithm is presented for the discrete PDXR problem. Thirdly, in the adjustment phase, the choice of intermediate nodes is expanded, and is no longer limited to the corner points of obstacles. Fourthly, a removal strategy of redundant points is proposed to optimize the routing path. Finally, the wirelength is further reduced by a local topology optimization strategy. The experimental results show that the proposed algorithm can achieve the best wirelength cost at a very fast speed under the constraint of restricted wirelength, so as to better satisfy the demand of the power and delay performance of semiconductor design for predictive intelligence in IoT applications. (C) 2021 Elsevier B.V. All rights reserved.

Automated summary

This article proposes a particle swarm optimization-based power-driven length-restricted X-routing algorithm for predictive intelligence in IoT applications. The experimental results show that the algorithm can achieve the best wirelength cost at a very fast speed under the constraint of restricted wirelength, so as to better satisfy the demand of semiconductor design.