A graph placement methodology for fast chip design

On the superiority of modularity-based clustering for determining placement-relevant clusters

(2020) Mateus Fogaça et al.   INTEGRATION-THE VLSI JOURNAL

The Cost of Application-Class Processing: Energy and Performance Analysis of a Linux-Ready 1.7-GHz 64-Bit RISC-V Core in 22-nm FDSOI Technology

(2019) Florian Zaruba et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

RePlAce: Advancing Solution Quality and Routability Validation in Global Placement

(2018) Chung-Kuan Cheng et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Mastering the game of Go without human knowledge

(2017) David Silver et al.   NATURE

ePlace

(2015) Jingwei Lu et al.   ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS

ePlace-MS: Electrostatics-Based Placement for Mixed-Size Circuits

(2015) Jingwei Lu et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Progress and Challenges in VLSI Placement Research

(2015) Igor L. Markov et al.   PROCEEDINGS OF THE IEEE

SimPL: An Effective Placement Algorithm

(2011) Myung-Chul Kim et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Optimizing Influenza Vaccine Distribution

(2009) J. Medlock et al.   SCIENCE

BonnPlace: Placement of Leading-Edge Chips by Advanced Combinatorial Algorithms

(2008) Ulrich Brenner et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Kraftwerk2—A Fast Force-Directed Quadratic Placement Approach Using an Accurate Net Model

(2008) P. Spindler et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs With Preplaced Blocks and Density Constraints

(2008) Tung-Chieh Chen et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS