4.7 Review

Layer-Scale and Chip-Scale Transfer Techniques for Functional Devices and Systems: A Review

期刊

NANOMATERIALS
卷 11, 期 4, 页码 -

出版社

MDPI
DOI: 10.3390/nano11040842

关键词

layer transfer; chip transfer; hetero-integration; micro-LED displays; flexible electronics

资金

  1. Science and Technology Planning Project of Guangdong Province [2017A070701025, 2017B010114002, 2019B010925001]
  2. Science and Technology Project of Guangzhou [201807010093]
  3. Technology Innovation Program of Foshan [2018IT100222]
  4. Key-Area Research and Development Program of Guangdong Province [2020B010183001]

向作者/读者索取更多资源

This review summarizes the development of transfer techniques for heterogeneous integration of semiconductor layers and devices, showcasing the advantages and improved performance brought by these technologies for various materials, devices, and systems applications. It also discusses the future research directions of layer transfer and chip transfer techniques.
Hetero-integration of functional semiconductor layers and devices has received strong research interest from both academia and industry. While conventional techniques such as pick-and-place and wafer bonding can partially address this challenge, a variety of new layer transfer and chip-scale transfer technologies have been developed. In this review, we summarize such transfer techniques for heterogeneous integration of ultrathin semiconductor layers or chips to a receiving substrate for many applications, such as microdisplays and flexible electronics. We showed that a wide range of materials, devices, and systems with expanded functionalities and improved performance can be demonstrated by using these technologies. Finally, we give a detailed analysis of the advantages and disadvantages of these techniques, and discuss the future research directions of layer transfer and chip transfer techniques.

作者

我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。

评论

主要评分

4.7
评分不足

次要评分

新颖性
-
重要性
-
科学严谨性
-
评价这篇论文

推荐

暂无数据
暂无数据