4.5 Article

A PWM/PFM Dual-Mode DC-DC Buck Converter with Load-Dependent Efficiency-Controllable Scheme for Multi-Purpose IoT Applications

期刊

ENERGIES
卷 14, 期 4, 页码 -

出版社

MDPI
DOI: 10.3390/en14040960

关键词

load-dependent efficiency control; selectable adaptive on-time; pulse frequency module; pulse width modulation; DC-DC buck converter

资金

  1. National Research Foundation of Korea (NRF) - Korea government (MSIT) [2017M1A2A2087833]
  2. Institute of Information & communications Technology Planning & Evaluation (IITP) - Korea government (MSIT) [2018-0-00756]
  3. Basic Science Research Program through the National Research Foundation of Korea (NRF) - Ministry of Education [2020R1A6A1A03040570]

向作者/读者索取更多资源

This paper presents a dual-mode DC-DC buck converter for multi-purpose IoT applications, with a load-dependent, efficiency-controllable scheme that adjusts the switching frequency based on load current for optimum power efficiency and further adjusts the on-time for different applications. In heavy-load applications, a conventional PWM control scheme is adopted with a gate driver structured to reduce dynamic current. The fabricated prototype achieves a measured maximum efficiency of 95.7% and power density of 0.83 W/mm(2) in a 180 nm CMOS process.
This paper presents a dual-mode DC-DC buck converter including a load-dependent, efficiency-controllable scheme to support multi-purpose IoT applications. For light-load applications, a selectable adaptive on-time pulse frequency modulation (PFM) control is proposed to achieve optimum power efficiency by selecting the optimum switching frequency according to the load current, thereby reducing unnecessary switching losses. When the inductor peak current value or converter output voltage ripple are considered in some applications, its on-time can be adjusted further. In heavy-load applications, a conventional pulse width modulation (PWM) control scheme is adopted, and its gate driver is structured to reduce dynamic current, preventing the current from shooting through the power switch. A proposed dual-mode buck converter prototype is fabricated in a 180 nm CMOS process, achieving its measured maximum efficiency of 95.7% and power density of 0.83 W/mm(2).

作者

我是这篇论文的作者
点击您的名字以认领此论文并将其添加到您的个人资料中。

评论

主要评分

4.5
评分不足

次要评分

新颖性
-
重要性
-
科学严谨性
-
评价这篇论文

推荐

暂无数据
暂无数据