Variance Reduction during the Fabrication of Sub-20 nm Si Cylindrical Nanopillars for Vertical Gate-All-Around Metal-Oxide-Semiconductor Field-Effect Transistors

标题
Variance Reduction during the Fabrication of Sub-20 nm Si Cylindrical Nanopillars for Vertical Gate-All-Around Metal-Oxide-Semiconductor Field-Effect Transistors
作者
关键词
-
出版物
ACS Omega
Volume 4, Issue 25, Pages 21115-21121
出版商
American Chemical Society (ACS)
发表日期
2019-12-03
DOI
10.1021/acsomega.9b02520

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