Low Complexity Generic VLSI Architecture Design Methodology for $N^{th}$ Root and $N^{th}$ Power Computations

标题
Low Complexity Generic VLSI Architecture Design Methodology for $N^{th}$ Root and $N^{th}$ Power Computations
作者
关键词
-
出版物
出版商
Institute of Electrical and Electronics Engineers (IEEE)
发表日期
2019-09-17
DOI
10.1109/tcsi.2019.2939720

向作者/读者发起求助以获取更多资源

Discover Peeref hubs

Discuss science. Find collaborators. Network.

Join a conversation

Publish scientific posters with Peeref

Peeref publishes scientific posters from all research disciplines. Our Diamond Open Access policy means free access to content and no publication fees for authors.

Learn More