iFPNA: A Flexible and Efficient Deep Learning Processor in 28-nm CMOS Using a Domain-Specific Instruction Set and Reconfigurable Fabric

标题
iFPNA: A Flexible and Efficient Deep Learning Processor in 28-nm CMOS Using a Domain-Specific Instruction Set and Reconfigurable Fabric
作者
关键词
-
出版商
Institute of Electrical and Electronics Engineers (IEEE)
发表日期
2019-05-02
DOI
10.1109/jetcas.2019.2914355

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