Energy‐efficient system‐on‐chip reconfigurable architecture design for sum of absolute difference computation in motion estimation process of H.265/HEVC video encoding

标题
Energy‐efficient system‐on‐chip reconfigurable architecture design for sum of absolute difference computation in motion estimation process of H.265/HEVC video encoding
作者
关键词
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出版物
出版商
Wiley
发表日期
2019-08-01
DOI
10.1002/cpe.5461

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